CWE-1232 - Improper Lock Behavior After Power State Transition

Read Time:23 Second

Description

Register lock bit protection disables changes to system configuration once the bit is set. Some of the protected registers or lock bits become programmable after power state transitions (e.g., Entry and wake from low power sleep modes) causing the system configuration to be changeable.

Modes of Introduction:

– Architecture and Design

Related Weaknesses

CWE-667

Consequences

Access Control: Modify Memory

Potential Mitigations

Phase: Architecture and Design, Implementation, Testing

Effectiveness: High

Description:

CVE References

InCWE- 1232, Improper Lock Behavior After Power State Transition

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